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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-08-02 14:07:33 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-08-03 18:28:09 +0300 |
commit | 8dac1e1f2068321fb4b7062d3c5408971f7a7e35 (patch) | |
tree | 180e7e8c13788a7f4637a36a9b481a688adabaeb /drivers/gpu/drm/i915/intel_pm.c | |
parent | 96a945aa4267b4b16f4ddace7d03775fd8752c9e (diff) | |
download | lwn-8dac1e1f2068321fb4b7062d3c5408971f7a7e35.tar.gz lwn-8dac1e1f2068321fb4b7062d3c5408971f7a7e35.zip |
drm/i915: Clean up the extra RPM ref on CHV with i915.enable_rc6=0
Remove the CHV early bail out from intel_cleanup_gt_powersave() so that
we'll clean up the extra RPM reference held due to i915.enable_rc6=0.
Cc: Imre Deak <imre.deak@intel.com>
Fixes: b268c699aca5 ("drm/i915: refactor RPM disabling due to RC6 being disabled")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470136053-23276-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index df02483fc755..63f454a8e811 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6541,9 +6541,7 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv) void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv) { - if (IS_CHERRYVIEW(dev_priv)) - return; - else if (IS_VALLEYVIEW(dev_priv)) + if (IS_VALLEYVIEW(dev_priv)) valleyview_cleanup_gt_powersave(dev_priv); if (!i915.enable_rc6) |