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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-09-04 18:25:21 +0300 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-16 23:22:26 +0200 |
commit | ef644fdac1709b91a8c7df546c6d597388f17a1b (patch) | |
tree | a4886c90a82b574b066bcd937390ef7149ac9a79 /drivers/gpu/drm/i915/intel_pm.c | |
parent | d68e7c3c7f0bf70899d27ca84f35a79e97707f07 (diff) | |
download | lwn-ef644fdac1709b91a8c7df546c6d597388f17a1b.tar.gz lwn-ef644fdac1709b91a8c7df546c6d597388f17a1b.zip |
drm/i915: Use adjusted_mode in intel_update_fbc()
Check the mode flags from the adjusted_mode, not user requested mode.
The hdisplay/vdisplay check actually checkes the primary plane size,
so those still need to come from the user requested mode.
Extract both modes from pipe config instead of the drm_crtc.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c1b601aacc3c..e5f7e56b7c47 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -458,6 +458,8 @@ void intel_update_fbc(struct drm_device *dev) struct drm_framebuffer *fb; struct intel_framebuffer *intel_fb; struct drm_i915_gem_object *obj; + const struct drm_display_mode *mode; + const struct drm_display_mode *adjusted_mode; unsigned int max_hdisplay, max_vdisplay; if (!I915_HAS_FBC(dev)) { @@ -502,6 +504,8 @@ void intel_update_fbc(struct drm_device *dev) fb = crtc->fb; intel_fb = to_intel_framebuffer(fb); obj = intel_fb->obj; + mode = &intel_crtc->config.requested_mode; + adjusted_mode = &intel_crtc->config.adjusted_mode; if (i915_enable_fbc < 0 && INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) { @@ -514,8 +518,8 @@ void intel_update_fbc(struct drm_device *dev) DRM_DEBUG_KMS("fbc disabled per module param\n"); goto out_disable; } - if ((crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) || - (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)) { + if ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) || + (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)) { if (set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED_MODE)) DRM_DEBUG_KMS("mode incompatible with compression, " "disabling\n"); @@ -529,8 +533,8 @@ void intel_update_fbc(struct drm_device *dev) max_hdisplay = 2048; max_vdisplay = 1536; } - if ((crtc->mode.hdisplay > max_hdisplay) || - (crtc->mode.vdisplay > max_vdisplay)) { + if ((mode->hdisplay > max_hdisplay) || + (mode->vdisplay > max_vdisplay)) { if (set_no_fbc_reason(dev_priv, FBC_MODE_TOO_LARGE)) DRM_DEBUG_KMS("mode too large for compression, disabling\n"); goto out_disable; |