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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-02-04 21:59:17 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-03-04 15:37:11 +0100 |
| commit | 743b57d830b8834026508050bd138c1247fccd4a (patch) | |
| tree | 46d46b107c8422d73a226c9c255dd873964fb1fd /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 5eb146dd0b092b79f2c2c5449e7e78e94c076ff9 (diff) | |
| download | lwn-743b57d830b8834026508050bd138c1247fccd4a.tar.gz lwn-743b57d830b8834026508050bd138c1247fccd4a.zip | |
drm/i915: There's no need to mask all 3D_CHICKEN bits on SNB
The need to set all of the mask bits for 3D_CHICKEN3 was required
only for pre-production hardware.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f4ac8f324b1c..08c1a756cdad 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4696,9 +4696,8 @@ static void gen6_init_clock_gating(struct drm_device *dev) GEN6_RCCUNIT_CLOCK_GATE_DISABLE); /* WaStripsFansDisableFastClipPerformanceFix:snb */ - /* Bspec says we need to always set all mask bits. */ - I915_WRITE(_3D_CHICKEN3, (0xFFFF << 16) | - _3D_CHICKEN3_SF_DISABLE_FASTCLIP_CULL); + I915_WRITE(_3D_CHICKEN3, + _MASKED_BIT_ENABLE(_3D_CHICKEN3_SF_DISABLE_FASTCLIP_CULL)); /* * Bspec says: |