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| author | Hoath, Nicholas <nicholas.hoath@intel.com> | 2015-02-05 10:47:21 +0000 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 23:28:09 +0100 |
| commit | 3dcd020a8e3ef5b5f5289a4785b85499adc7626b (patch) | |
| tree | e02a413f6824590da0bb359da000922649d42546 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 8424171e135ce956ed2473493b061909199572c7 (diff) | |
| download | lwn-3dcd020a8e3ef5b5f5289a4785b85499adc7626b.tar.gz lwn-3dcd020a8e3ef5b5f5289a4785b85499adc7626b.zip | |
drm/i915/gen9: Implement WaDisableSDEUnitClockGating
v2: Add stepping check for WaDisableSDEUnitClockGating.
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Rebase.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2b89aacdda90..874ec9f2023c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -56,12 +56,14 @@ static void gen9_init_clock_gating(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - /* - * WaDisableSDEUnitClockGating:skl - * This seems to be a pre-production w/a. - */ - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | - GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + if (INTEL_REVID(dev) == SKL_REVID_A0) { + /* + * WaDisableSDEUnitClockGating:skl + * This seems to be a pre-production w/a. + */ + I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | + GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + } /* Wa4x4STCOptimizationDisable:skl */ I915_WRITE(CACHE_MODE_1, |