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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-11-07 21:33:43 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-14 10:29:25 +0100 |
commit | c6e8f39db96d63a1b4eda32e7dfeac093edc09ee (patch) | |
tree | 4839a7f0c8d456a70e09f8363af717843ba75089 /drivers/gpu/drm/i915/intel_pm.c | |
parent | f1f55cc0556031c8ee3fe99dae7251e78b9b653b (diff) | |
download | lwn-c6e8f39db96d63a1b4eda32e7dfeac093edc09ee.tar.gz lwn-c6e8f39db96d63a1b4eda32e7dfeac093edc09ee.zip |
drm/i915: Read the CCK fuse register from CCK
When reading a CCK register we should obviously read it from CCK not
Punit. This problem has been present ever since this of code was
introduced in
commit 67c3bf6f55a97a0915a0f9ea07278a3073cc9601
Author: Deepak S <deepak.s@linux.intel.com>
Date: Thu Jul 10 13:16:24 2014 +0530
drm/i915: populate mem_freq/cz_clock for chv
The problem was raised during review by Mika [1] but somehow slipped
through the cracks, and the patch got applied with the problem unfixed.
[1] http://lists.freedesktop.org/archives/intel-gfx/2014-July/048937.html
Cc: Deepak S <deepak.s@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 62ffb1b81dff..9e87265f2448 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5195,7 +5195,10 @@ static void cherryview_init_gt_powersave(struct drm_device *dev) mutex_lock(&dev_priv->rps.hw_lock); - val = vlv_punit_read(dev_priv, CCK_FUSE_REG); + mutex_lock(&dev_priv->dpio_lock); + val = vlv_cck_read(dev_priv, CCK_FUSE_REG); + mutex_unlock(&dev_priv->dpio_lock); + switch ((val >> 2) & 0x7) { case 0: case 1: |