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author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-11-21 18:18:51 +0000 |
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committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-11-22 11:25:05 +0000 |
commit | 36cc8b963f5eb46352dc79d79e4bd5e8dd2ac2d6 (patch) | |
tree | 425f1dcf9615b320a2f8bcc480793d31dc20019e /drivers/gpu/drm/i915/intel_pm.c | |
parent | 0cd4684d6ea9a4ffec33fc19de4dd667bb90d0a5 (diff) | |
download | lwn-36cc8b963f5eb46352dc79d79e4bd5e8dd2ac2d6.tar.gz lwn-36cc8b963f5eb46352dc79d79e4bd5e8dd2ac2d6.zip |
drm/i915: Convert intel_rc6_residency_us to ns
Will be used for exposing the PMU counters.
v2:
* Move intel_runtime_pm_get/put to the callers. (Chris Wilson)
* Restore full unit conversion precision.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171121181852.16128-8-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f1dc36c1fd69..7d41aad79166 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9437,36 +9437,35 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv, return lower | (u64)upper << 8; } -u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, +u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, const i915_reg_t reg) { - u64 time_hw, units, div; + u64 time_hw; + u32 mul, div; if (!intel_rc6_enabled()) return 0; - intel_runtime_pm_get(dev_priv); - /* On VLV and CHV, residency time is in CZ units rather than 1.28us */ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { - units = 1000; + mul = 1000000; div = dev_priv->czclk_freq; - time_hw = vlv_residency_raw(dev_priv, reg); - } else if (IS_GEN9_LP(dev_priv)) { - units = 1000; - div = 1200; /* 833.33ns */ - time_hw = I915_READ(reg); } else { - units = 128000; /* 1.28us */ - div = 100000; + /* 833.33ns units on Gen9LP, 1.28us elsewhere. */ + if (IS_GEN9_LP(dev_priv)) { + mul = 10000; + div = 12; + } else { + mul = 1280; + div = 1; + } time_hw = I915_READ(reg); } - intel_runtime_pm_put(dev_priv); - return DIV_ROUND_UP_ULL(time_hw * units, div); + return DIV_ROUND_UP_ULL(time_hw * mul, div); } u32 intel_get_cagf(struct drm_i915_private *dev_priv, u32 rpstat) |