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authorNick Hoath <nicholas.hoath@intel.com>2015-02-05 10:47:19 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-02-13 23:28:08 +0100
commit1de4582f98db7eafd12695139aed7df6a0a0ff3a (patch)
tree37583e5d8685dbc35c51989814b226555148e817 /drivers/gpu/drm/i915/intel_pm.c
parentab0dfafefd85b0abf61f0efad769803bee8e49fb (diff)
downloadlwn-1de4582f98db7eafd12695139aed7df6a0a0ff3a.tar.gz
lwn-1de4582f98db7eafd12695139aed7df6a0a0ff3a.zip
drm/i915/gen9: Implement WaDisableDgMirrorFixInHalfSliceChicken5
Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds v2: Added stepping check v3: Removed unused register bitmap Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> [danvet: Bikesheds.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bebefe79f7ce..2b89aacdda90 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev)
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
- /*
- * WaDisableDgMirrorFixInHalfSliceChicken5:skl
- * This is a pre-production w/a.
- */
- I915_WRITE(GEN9_HALF_SLICE_CHICKEN5,
- I915_READ(GEN9_HALF_SLICE_CHICKEN5) &
- ~GEN9_DG_MIRROR_FIX_ENABLE);
-
/* Wa4x4STCOptimizationDisable:skl */
I915_WRITE(CACHE_MODE_1,
_MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));