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author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-08-06 18:57:13 -0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-23 14:52:26 +0200 |
commit | edbfdb456053d0738e6b06a3827ead4158bfc918 (patch) | |
tree | d694ee51770617896cb1d940672354efdb4ad48d /drivers/gpu/drm/i915/intel_pm.c | |
parent | 43eaea131823c5ca13d03364e61bd15f0b22a0f7 (diff) | |
download | lwn-edbfdb456053d0738e6b06a3827ead4158bfc918.tar.gz lwn-edbfdb456053d0738e6b06a3827ead4158bfc918.zip |
drm/i915: wrap GEN6_PMIMR changes
Just like we're doing with the other IMR changes.
One of the functional changes is that not every caller was doing the
POSTING_READ.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7bc3f1783174..4f0857346bfd 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3450,7 +3450,7 @@ static void gen6_enable_rps_interrupts(struct drm_device *dev) spin_lock_irq(&dev_priv->irq_lock); WARN_ON(dev_priv->rps.pm_iir); - I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS); + snb_enable_pm_irq(dev_priv, GEN6_PM_RPS_EVENTS); I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS); spin_unlock_irq(&dev_priv->irq_lock); /* only unmask PM interrupts we need. Mask all others. */ |