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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-05-03 12:15:36 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-10 21:56:30 +0200
commitb97186f0d94808ce94cd9b77b40e78f2fbd6e6b2 (patch)
tree7c396b4a9eb8e8de47e82b7e6956095e68f9307a /drivers/gpu/drm/i915/intel_pm.c
parent7df5080bc7f3e3fba9cddac71133ed52864c40be (diff)
downloadlwn-b97186f0d94808ce94cd9b77b40e78f2fbd6e6b2.tar.gz
lwn-b97186f0d94808ce94cd9b77b40e78f2fbd6e6b2.zip
drm/i915: add intel_display_power_enabled
This should replace intel_using_power_well. The idea is that we're adding the requested power domain as an argument, so this might enable the code to look less platform-specific and also allows us to easily add new domains in case we need. v2: Add more domains to enum intel_display_power_domain v3: Even more domains requested Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c24
1 files changed, 20 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 556b9892bb92..9b3e90e10ed7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4344,15 +4344,31 @@ void intel_init_clock_gating(struct drm_device *dev)
* enable it, so check if it's enabled and also check if we've requested it to
* be enabled.
*/
-bool intel_using_power_well(struct drm_device *dev)
+bool intel_display_power_enabled(struct drm_device *dev,
+ enum intel_display_power_domain domain)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- if (IS_HASWELL(dev))
+ if (!HAS_POWER_WELL(dev))
+ return true;
+
+ switch (domain) {
+ case POWER_DOMAIN_PIPE_A:
+ case POWER_DOMAIN_TRANSCODER_EDP:
+ return true;
+ case POWER_DOMAIN_PIPE_B:
+ case POWER_DOMAIN_PIPE_C:
+ case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
+ case POWER_DOMAIN_PIPE_B_PANEL_FITTER:
+ case POWER_DOMAIN_PIPE_C_PANEL_FITTER:
+ case POWER_DOMAIN_TRANSCODER_A:
+ case POWER_DOMAIN_TRANSCODER_B:
+ case POWER_DOMAIN_TRANSCODER_C:
return I915_READ(HSW_PWR_WELL_DRIVER) ==
(HSW_PWR_WELL_ENABLE | HSW_PWR_WELL_STATE);
- else
- return true;
+ default:
+ BUG();
+ }
}
void intel_set_power_well(struct drm_device *dev, bool enable)