diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-08-30 14:30:23 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-10 11:16:38 +0200 |
| commit | ac830fe1c3d811db2bef1835b6e0c693bc3b237e (patch) | |
| tree | 11acd42fa2da1ed5f4ff40daef6d741e55e650bd /drivers/gpu/drm/i915/intel_pm.c | |
| parent | f37fcc2a263b3a6d9fb9730e0d828a3f9d15a8b0 (diff) | |
| download | lwn-ac830fe1c3d811db2bef1835b6e0c693bc3b237e.tar.gz lwn-ac830fe1c3d811db2bef1835b6e0c693bc3b237e.zip | |
drm/i915: Constify some watermark data
hsw_pipe_wm_parameters and hsw_wm_maximums typically are read only. Make
them const.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 77dfd1414ef4..3dd2fd859fb0 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2205,7 +2205,7 @@ struct intel_wm_config { * For both WM_PIPE and WM_LP. * mem_value must be in 0.1us units. */ -static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params, +static uint32_t ilk_compute_pri_wm(const struct hsw_pipe_wm_parameters *params, uint32_t mem_value, bool is_lp) { @@ -2234,7 +2234,7 @@ static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params, * For both WM_PIPE and WM_LP. * mem_value must be in 0.1us units. */ -static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params, +static uint32_t ilk_compute_spr_wm(const struct hsw_pipe_wm_parameters *params, uint32_t mem_value) { uint32_t method1, method2; @@ -2257,7 +2257,7 @@ static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params, * For both WM_PIPE and WM_LP. * mem_value must be in 0.1us units. */ -static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params, +static uint32_t ilk_compute_cur_wm(const struct hsw_pipe_wm_parameters *params, uint32_t mem_value) { if (!params->active || !params->cur.enabled) @@ -2271,7 +2271,7 @@ static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params, } /* Only for WM_LP. */ -static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params, +static uint32_t ilk_compute_fbc_wm(const struct hsw_pipe_wm_parameters *params, uint32_t pri_val) { if (!params->active || !params->pri.enabled) @@ -2422,7 +2422,7 @@ static bool ilk_check_wm(int level, static void ilk_compute_wm_level(struct drm_i915_private *dev_priv, int level, - struct hsw_pipe_wm_parameters *p, + const struct hsw_pipe_wm_parameters *p, struct intel_wm_level *result) { uint16_t pri_latency = dev_priv->wm.pri_latency[level]; @@ -2444,8 +2444,8 @@ static void ilk_compute_wm_level(struct drm_i915_private *dev_priv, } static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv, - int level, struct hsw_wm_maximums *max, - struct hsw_pipe_wm_parameters *params, + int level, const struct hsw_wm_maximums *max, + const struct hsw_pipe_wm_parameters *params, struct intel_wm_level *result) { enum pipe pipe; @@ -2465,7 +2465,7 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv, static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, - struct hsw_pipe_wm_parameters *params) + const struct hsw_pipe_wm_parameters *params) { uint32_t pri_val, cur_val, spr_val; /* WM0 latency values stored in 0.1us units */ @@ -2673,8 +2673,8 @@ static void hsw_compute_wm_parameters(struct drm_device *dev, } static void hsw_compute_wm_results(struct drm_device *dev, - struct hsw_pipe_wm_parameters *params, - struct hsw_wm_maximums *lp_maximums, + const struct hsw_pipe_wm_parameters *params, + const struct hsw_wm_maximums *lp_maximums, struct hsw_wm_values *results) { struct drm_i915_private *dev_priv = dev->dev_private; |