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author | Jani Nikula <jani.nikula@intel.com> | 2021-10-14 13:28:57 +0300 |
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committer | Jani Nikula <jani.nikula@intel.com> | 2021-10-14 18:04:17 +0300 |
commit | 4dd4375bc4ff217f0a4a931772400c987720fb65 (patch) | |
tree | 07345426e298bbc175219a2bd529c79869709bc5 /drivers/gpu/drm/i915/intel_pcode.h | |
parent | 05734ca2a8f76c9eb3890b3c9dfc3467f03105c1 (diff) | |
download | lwn-4dd4375bc4ff217f0a4a931772400c987720fb65.tar.gz lwn-4dd4375bc4ff217f0a4a931772400c987720fb65.zip |
drm/i915: split out intel_pcode.[ch] to separate file
The snb+ pcode mailbox code is not sideband, so split it out to a
separate file. As can be seen from the #include changes, very few places
use both sideband and pcode.
Code movement only.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/185deb18eb739e5ae019e27834b9997dcc1347bc.1634207064.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pcode.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pcode.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pcode.h b/drivers/gpu/drm/i915/intel_pcode.h new file mode 100644 index 000000000000..50806649d4b6 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_pcode.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2013-2021 Intel Corporation + */ + +#ifndef _INTEL_PCODE_H_ +#define _INTEL_PCODE_H_ + +#include <linux/types.h> + +struct drm_i915_private; + +int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox, + u32 *val, u32 *val1); +int sandybridge_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, + u32 val, int fast_timeout_us, + int slow_timeout_ms); +#define sandybridge_pcode_write(i915, mbox, val) \ + sandybridge_pcode_write_timeout(i915, mbox, val, 500, 0) + +int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request, + u32 reply_mask, u32 reply, int timeout_base_ms); + +int intel_pcode_init(struct drm_i915_private *i915); + +#endif /* _INTEL_PCODE_H */ |