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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-11-30 16:23:43 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-12-02 11:22:56 +0200 |
| commit | 83d83392e3e5432a9240e6b060119f01d27f2a30 (patch) | |
| tree | 526e97b48972f1c2d3a0d50793cab86e9c690e33 /drivers/gpu/drm/i915/intel_panel.c | |
| parent | 245f586876eefc55438f0d65856fbe15de8dadca (diff) | |
| download | lwn-83d83392e3e5432a9240e6b060119f01d27f2a30.tar.gz lwn-83d83392e3e5432a9240e6b060119f01d27f2a30.zip | |
drm/i915: Fix vbt PWM max setup for CTG
CTG uses hrawclk for backlight, so calculate the max based on that
instead of cdclk.
Fixes: aa17cdb4f836 ("drm/i915: initialize backlight max from VBT")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1448893432-6978-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_panel.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index c3d3bba97651..d4beac3c19a4 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -1352,13 +1352,19 @@ static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) /* * Gen4: This value represents the period of the PWM stream in display core - * clocks multiplied by 128. + * clocks ([DevCTG] HRAW clocks) multiplied by 128. + * */ static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) { struct drm_device *dev = connector->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - int clock = 1000 * dev_priv->display.get_display_clock_speed(dev); + int clock; + + if (IS_G4X(dev_priv)) + clock = MHz(intel_hrawclk(dev)); + else + clock = 1000 * dev_priv->display.get_display_clock_speed(dev); return clock / (pwm_freq_hz * 128); } |