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| author | Shaohua Li <shaohua.li@intel.com> | 2009-04-07 11:02:28 +0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-05-14 16:00:26 -0700 |
| commit | 0ba0e9e1f173a59ba402a253d356612c821b7a14 (patch) | |
| tree | 942e1852a2beb7b0ad020c935a4fd18d3d750553 /drivers/gpu/drm/i915/intel_modes.c | |
| parent | 13f4c435ebf2a7c150ffa714f3b23b8e4e8cb42f (diff) | |
| download | lwn-0ba0e9e1f173a59ba402a253d356612c821b7a14.tar.gz lwn-0ba0e9e1f173a59ba402a253d356612c821b7a14.zip | |
drm/i915: workaround IGD i2c bus issue in kernel side (v2)
In IGD, DPCUNIT_CLOCK_GATE_DISABLE bit should be set, otherwise i2c
access will be wrong.
v2: Disable CLOCK_GATE_DISABLE bit after bit bashing as suggested by Eric.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_modes.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_modes.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c index 07d7ec976168..e0910fefce87 100644 --- a/drivers/gpu/drm/i915/intel_modes.c +++ b/drivers/gpu/drm/i915/intel_modes.c @@ -27,6 +27,7 @@ #include <linux/fb.h> #include "drmP.h" #include "intel_drv.h" +#include "i915_drv.h" /** * intel_ddc_probe @@ -52,7 +53,10 @@ bool intel_ddc_probe(struct intel_output *intel_output) } }; + intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true); ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2); + intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false); + if (ret == 2) return true; @@ -70,8 +74,10 @@ int intel_ddc_get_modes(struct intel_output *intel_output) struct edid *edid; int ret = 0; + intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true); edid = drm_get_edid(&intel_output->base, &intel_output->ddc_bus->adapter); + intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false); if (edid) { drm_mode_connector_update_edid_property(&intel_output->base, edid); |