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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-05-04 17:18:22 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-08 14:15:59 +0200 |
| commit | 60c5ea2dd981d929d873823433294b991d3e3cd8 (patch) | |
| tree | 597935f9f440fd7b7b9438601141a7cef781b9c1 /drivers/gpu/drm/i915/intel_hdmi.c | |
| parent | ecb978515c88183b111b8994acd6b572b1361a72 (diff) | |
| download | lwn-60c5ea2dd981d929d873823433294b991d3e3cd8.tar.gz lwn-60c5ea2dd981d929d873823433294b991d3e3cd8.zip | |
drm/i915: mask the video DIP frequency when changing it
Better safe than sorry. Currently we never change the frequency and
use the same for every infoframe type, so the only way to reproduce a
bug would be with the BIOS doing something.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_hdmi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 6c96bb54e967..4a4ee8b25f2f 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -164,6 +164,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder, } val |= intel_infoframe_enable(frame); + val &= ~VIDEO_DIP_FREQ_MASK; val |= intel_infoframe_frequency(frame); I915_WRITE(VIDEO_DIP_CTL, val); @@ -203,6 +204,7 @@ static void ironlake_write_infoframe(struct drm_encoder *encoder, } val |= intel_infoframe_enable(frame); + val &= ~VIDEO_DIP_FREQ_MASK; val |= intel_infoframe_frequency(frame); I915_WRITE(reg, val); @@ -236,6 +238,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder, } val |= intel_infoframe_enable(frame); + val &= ~VIDEO_DIP_FREQ_MASK; val |= intel_infoframe_frequency(frame); I915_WRITE(reg, val); |