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author | Gaurav K Singh <gaurav.k.singh@intel.com> | 2014-12-05 14:09:28 +0530 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-12-05 15:28:04 +0100 |
commit | 369602d370fac9d3bda125c8cc36c8f779910bf1 (patch) | |
tree | 7324c558abe88680e873a6342c34656c47f60ecb /drivers/gpu/drm/i915/intel_dsi.h | |
parent | 8edfbb8bfc7ef291b12f683f40de8cf274ae8ed3 (diff) | |
download | lwn-369602d370fac9d3bda125c8cc36c8f779910bf1.tar.gz lwn-369602d370fac9d3bda125c8cc36c8f779910bf1.zip |
drm/i915: Add support for port enable/disable for dual link configuration
For Dual Link MIPI Panels, both Port A and Port C should be enabled
during the MIPI encoder enabling sequence. Similarly, during the
disabling sequence, both ports needs to be disabled.
v2: Used for_each_dsi_port macro instead of for loop
v3: Used intel_dsi->ports instead of dual_link var for dual link configuration check
v4: Masking of the required MIPI port bits before writing proper values
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index 7f5d0280b9d7..f2cc2fc8c979 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -104,6 +104,7 @@ struct intel_dsi { u8 clock_stop; u8 escape_clk_div; + u8 dual_link; u32 port_bits; u32 bw_timer; u32 dphy_reg; |