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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-10-24 16:06:19 -0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-10-26 10:24:46 +0200
commitad80a810ec3ffa96450ce3b40128d55fede7a825 (patch)
tree03f6f55c6d35782fe21607f966d5a94bf196af71 /drivers/gpu/drm/i915/intel_drv.h
parentbb523fc08d4a4a726c7555be7800735685888b3c (diff)
downloadlwn-ad80a810ec3ffa96450ce3b40128d55fede7a825.tar.gz
lwn-ad80a810ec3ffa96450ce3b40128d55fede7a825.zip
drm/i915: convert DDI_FUNC_CTL to transcoder
Because there's one instance of the register per CPU transcoder and not per CPU pipe. This is another register that appeared for the first time on Haswell, and even though its Haswell name is PIPE_DDI_FUNC_CTL, it will be renamed to TRANS_DDI_FUNC_CTL, so let's just use the new naming scheme before it confuses more people. Notice that there's a big improvement on intel_ddi_get_hw_state due to the new TRANSCODER_EDP. V2: Also rename the register to TRANS_DDI_FUNC_CTL as suggested by Damien Lespiau. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 90e706c846a4..2ad70d744232 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -610,8 +610,8 @@ extern void intel_ddi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *adjusted_mode);
extern void intel_ddi_pll_init(struct drm_device *dev);
extern void intel_ddi_enable_pipe_func(struct drm_crtc *crtc);
-extern void intel_ddi_disable_pipe_func(struct drm_i915_private *dev_priv,
- enum pipe pipe);
+extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder);
extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);