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authorTodd Previte <tprevite@gmail.com>2015-04-15 08:38:41 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-04-16 13:31:46 +0200
commit74ebf294a1dd816bdc248ac733009a8915d59eb5 (patch)
tree3740201efaef17377e688ed04d35b1f8c8dd65ac /drivers/gpu/drm/i915/intel_dp.c
parentc5d5ab7a05bc311dd0e57bdfd925ae4720f77a58 (diff)
downloadlwn-74ebf294a1dd816bdc248ac733009a8915d59eb5.tar.gz
lwn-74ebf294a1dd816bdc248ac733009a8915d59eb5.zip
drm/i915: Add a delay in Displayport AUX transactions for compliance testing
The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1 specifies that repeated AUX transactions after a failure (no response / invalid response) must have a minimum delay of 400us before the resend can occur. Tests 4.2.1.1 and 4.2.1.2 are two tests that require this specifically. Also, the check for DP_AUX_CH_CTL_TIME_OUT_ERROR has been moved out into a separate case. This case just continues with the next iteration of the loop as the HW has already waited the required amount of time. V2: - Changed udelay() to usleep_range() V3: - Removed extraneous check for timeout - Updated comment to reflect this change V4: - Reformatted a comment V5: - Added separate check for HW timeout on AUX transactions. A message is logged upon detection of this case. V6: - Add continue statement to HW timeout detect case - Remove the log message indicating a timeout has been detected (review feedback) V7: - Updated the commit message to remove verbage about the HW timeout case that is no longer valid. Signed-off-by: Todd Previte <tprevite@gmail.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 371d1e6129e5..ae4baf96bb00 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -874,9 +874,18 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
DP_AUX_CH_CTL_TIME_OUT_ERROR |
DP_AUX_CH_CTL_RECEIVE_ERROR);
- if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR))
+ if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
continue;
+
+ /* DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
+ * 400us delay required for errors and timeouts
+ * Timeout errors from the HW already meet this
+ * requirement so skip to next iteration
+ */
+ if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
+ usleep_range(400, 500);
+ continue;
+ }
if (status & DP_AUX_CH_CTL_DONE)
break;
}