diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-10-16 21:27:34 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-04 23:22:01 +0100 |
| commit | 61234fa5e5232c35f87d44d9d596af4b10eac255 (patch) | |
| tree | a63664a71dcba97d57a0604dadd381c21493b9a6 /drivers/gpu/drm/i915/intel_dp.c | |
| parent | 093e3f134e2eff13503f708b81aecc2501e7aecb (diff) | |
| download | lwn-61234fa5e5232c35f87d44d9d596af4b10eac255.tar.gz lwn-61234fa5e5232c35f87d44d9d596af4b10eac255.zip | |
drm/i915: Wait for PHY port ready before link training on VLV/CHV
There's no point in checking if the data lanes came out of reset after
link training. If the data lanes aren't ready link training will fail
anyway.
Suggested-by: Todd Previte <tprevite@gmail.com>
Cc: Todd Previte <tprevite@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Acked-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index cad4e112cfaa..f3b6cd5057ea 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2550,6 +2550,9 @@ static void intel_enable_dp(struct intel_encoder *encoder) pps_unlock(intel_dp); + if (IS_VALLEYVIEW(dev)) + vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp)); + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp_start_link_train(intel_dp); intel_dp_complete_link_train(intel_dp); @@ -2685,8 +2688,6 @@ static void vlv_pre_enable_dp(struct intel_encoder *encoder) mutex_unlock(&dev_priv->dpio_lock); intel_enable_dp(encoder); - - vlv_wait_port_ready(dev_priv, dport); } static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder) @@ -2779,8 +2780,6 @@ static void chv_pre_enable_dp(struct intel_encoder *encoder) mutex_unlock(&dev_priv->dpio_lock); intel_enable_dp(encoder); - - vlv_wait_port_ready(dev_priv, dport); } static void chv_dp_pre_pll_enable(struct intel_encoder *encoder) |