diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-06-28 02:04:03 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-08-08 17:43:44 +0200 |
commit | 1fb44505f6c547742fcbcba4d3999fb324b5f587 (patch) | |
tree | cbf2503af601593d6f9dac6d2d7acc44ced2b5f0 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 625695f8c3383765fd8974616aa57ffdbc644f83 (diff) | |
download | lwn-1fb44505f6c547742fcbcba4d3999fb324b5f587.tar.gz lwn-1fb44505f6c547742fcbcba4d3999fb324b5f587.zip |
drm/i915: Clarify CHV swing margin/deemph bits
CHV display PHY registes have two swing margin/deemph settings. Make it
clear which ones we're using.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 33a45a819525..95b972736733 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2649,8 +2649,8 @@ static uint32_t intel_chv_signal_levels(struct intel_dp *intel_dp) /* Program swing margin */ for (i = 0; i < 4; i++) { val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i)); - val &= ~DPIO_SWING_MARGIN_MASK; - val |= margin_reg_value << DPIO_SWING_MARGIN_SHIFT; + val &= ~DPIO_SWING_MARGIN000_MASK; + val |= margin_reg_value << DPIO_SWING_MARGIN000_SHIFT; vlv_dpio_write(dev_priv, pipe, CHV_TX_DW2(ch, i), val); } |