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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-07-21 13:57:47 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-01 19:35:15 -0700 |
| commit | 4f444071702bf0b76cfb381150cf0fc8cacdc931 (patch) | |
| tree | e85f0e9b900c2c7be5c6d74e2bf039be2afefb1e /drivers/gpu/drm/i915/intel_dp.c | |
| parent | 831cd4453598b2c8e193f077023910c6b0c39558 (diff) | |
| download | lwn-4f444071702bf0b76cfb381150cf0fc8cacdc931.tar.gz lwn-4f444071702bf0b76cfb381150cf0fc8cacdc931.zip | |
drm/i915: apply DP bandwidth workaround for PCH eDP as well
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=29141 though the
workaround itself is still a bit of a mystery.
Tested-by: Adam Hill <sidepipeuk@yahoo.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c612981e6195..5a11a2bada37 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -534,7 +534,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, } } - if (IS_eDP(intel_encoder)) { + if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) { /* okay we failed just pick the highest */ dp_priv->lane_count = max_lane_count; dp_priv->link_bw = bws[max_clock]; |