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author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-10-07 16:01:23 -0700 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-08 10:28:27 +0100 |
commit | 895692befab73fd399d854c7db41d6d7260af2da (patch) | |
tree | dbe98553bdd8b1ace5fa21838c5a6e784e433e07 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 869184a675662bddcdf76c5b95665272facff2b8 (diff) | |
download | lwn-895692befab73fd399d854c7db41d6d7260af2da.tar.gz lwn-895692befab73fd399d854c7db41d6d7260af2da.zip |
drm/i915/dp: don't bother with DP PLL for PCH attached eDP
We don't use the CPU DP PLL with PCH attached eDP panels, so don't
bother to enable it.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d4ef20598da8..ada7319f0eaf 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -775,7 +775,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, if (intel_crtc->pipe == 1 && !HAS_PCH_CPT(dev)) intel_dp->DP |= DP_PIPEB_SELECT; - if (is_edp(intel_dp)) { + if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) { /* don't miss out required setting for eDP */ intel_dp->DP |= DP_PLL_ENABLE; if (adjusted_mode->clock < 200000) |