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| author | Priit Laes <plaes@plaes.org> | 2010-03-02 11:37:00 +0200 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-03-17 12:59:31 -0700 |
| commit | 4967790112b284f276c5065dc724f7340a2fd7a5 (patch) | |
| tree | f312fac0165573762759fd2f76d94bef97ee894c /drivers/gpu/drm/i915/intel_display.c | |
| parent | 5d9391628e8eb3b0830697697a95bfd0c3c35b9e (diff) | |
| download | lwn-4967790112b284f276c5065dc724f7340a2fd7a5.tar.gz lwn-4967790112b284f276c5065dc724f7340a2fd7a5.zip | |
drm/i915: Rename FBC_C3_IDLE to FBC_CTL_C3_IDLE to match other registers
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9cd6de5f9906..0e2c5dafd9d3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1032,7 +1032,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) /* enable it... */ fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC; if (IS_I945GM(dev)) - fbc_ctl |= FBC_C3_IDLE; /* 945 needs special SR handling */ + fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */ fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; if (obj_priv->tiling_mode != I915_TILING_NONE) |