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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-06-13 13:37:49 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-07 11:23:21 +0200
commitd197b7d3480b5c9a3c33b224684fa942d76d1e59 (patch)
tree47b817cbf4df6ef92db97dad7261271e5142ba7e /drivers/gpu/drm/i915/intel_display.c
parent9cf33db5eb6a485a16668e19dbcfdfc0f6c61090 (diff)
downloadlwn-d197b7d3480b5c9a3c33b224684fa942d76d1e59.tar.gz
lwn-d197b7d3480b5c9a3c33b224684fa942d76d1e59.zip
drm/i915: Move vlv cdclk code to .get_display_clock_speed()
We have a standard hook for reading out the current cdclk. Move the VLV code from valleyview_cur_cdclk() to .get_display_clock_speed(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c33
1 files changed, 13 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3feaaba3616d..310218afe9c9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4485,7 +4485,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
struct drm_i915_private *dev_priv = dev->dev_private;
u32 val, cmd;
- WARN_ON(valleyview_cur_cdclk(dev_priv) != dev_priv->vlv_cdclk_freq);
+ WARN_ON(dev_priv->display.get_display_clock_speed(dev) != dev_priv->vlv_cdclk_freq);
dev_priv->vlv_cdclk_freq = cdclk;
if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */
@@ -4542,24 +4542,6 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
intel_i2c_reset(dev);
}
-int valleyview_cur_cdclk(struct drm_i915_private *dev_priv)
-{
- int cur_cdclk, vco;
- int divider;
-
- vco = valleyview_get_vco(dev_priv);
-
- mutex_lock(&dev_priv->dpio_lock);
- divider = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
- mutex_unlock(&dev_priv->dpio_lock);
-
- divider &= DISPLAY_FREQUENCY_VALUES;
-
- cur_cdclk = DIV_ROUND_CLOSEST(vco << 1, divider + 1);
-
- return cur_cdclk;
-}
-
static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv,
int max_pixclk)
{
@@ -5269,7 +5251,18 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
static int valleyview_get_display_clock_speed(struct drm_device *dev)
{
- return 400000; /* FIXME */
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int vco = valleyview_get_vco(dev_priv);
+ u32 val;
+ int divider;
+
+ mutex_lock(&dev_priv->dpio_lock);
+ val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
+ mutex_unlock(&dev_priv->dpio_lock);
+
+ divider = val & DISPLAY_FREQUENCY_VALUES;
+
+ return DIV_ROUND_CLOSEST(vco << 1, divider + 1);
}
static int i945_get_display_clock_speed(struct drm_device *dev)