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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2013-07-25 10:06:50 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-05 19:04:02 +0200 |
| commit | b6dfdc9b7f0d7859ea146b6c869aa2cfe6d713f3 (patch) | |
| tree | 299c61630fa58c5eb939dedd5b098c3f58383aa5 /drivers/gpu/drm/i915/intel_display.c | |
| parent | 63cf9a131ee60fa2458d75f5c0d7a3a5dcaa2b3e (diff) | |
| download | lwn-b6dfdc9b7f0d7859ea146b6c869aa2cfe6d713f3.tar.gz lwn-b6dfdc9b7f0d7859ea146b6c869aa2cfe6d713f3.zip | |
drm/i915: enable IPS for bpp <= 24
Art confirms that this should work fine. Since most panels are 18bpp
with dithering from 24bpp, the existing code wouldn't be enabled in most
cases.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d82e225294a6..dc7ad2a4a14d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4091,7 +4091,7 @@ static void hsw_compute_ips_config(struct intel_crtc *crtc, { pipe_config->ips_enabled = i915_enable_ips && hsw_crtc_supports_ips(crtc) && - pipe_config->pipe_bpp == 24; + pipe_config->pipe_bpp <= 24; } static int intel_crtc_compute_config(struct intel_crtc *crtc, |