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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-09-04 18:30:06 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-17 10:03:39 +0200 |
| commit | b397c96b6d6478910cd4263af3124ee07d304e8b (patch) | |
| tree | 7c75c1696de4c40cdcac01c82d8493d35c6480ec /drivers/gpu/drm/i915/intel_display.c | |
| parent | 1d1d0e277ee706413e2a3b3c671e3cf29c8d0dd2 (diff) | |
| download | lwn-b397c96b6d6478910cd4263af3124ee07d304e8b.tar.gz lwn-b397c96b6d6478910cd4263af3124ee07d304e8b.zip | |
drm/i915: Fix up pipe vs. double wide confusion
Double wide mode is only available on pipe A, except on GDG where
pipe B is also double wide capable.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9bbb6ea34d06..4dd6561cb7c8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4153,10 +4153,10 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, * Enable pixel doubling when the dot clock * is > 90% of the (display) core speed. * - * XXX: No double-wide on 915GM pipe B. Is that - * the only reason for the pipe == PIPE_A check? + * GDG double wide on either pipe, + * otherwise pipe A only. */ - if (crtc->pipe == PIPE_A && + if ((crtc->pipe == PIPE_A || IS_I915G(dev)) && adjusted_mode->clock > clock_limit * 9 / 10) { clock_limit *= 2; pipe_config->double_wide = true; |