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authorChris Wilson <chris@chris-wilson.co.uk>2012-03-22 15:10:00 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-12 21:14:04 +0200
commit9a5a53b3923d6e8cc4d3b352301059ac6b5c8f68 (patch)
treea8b5492584e236e4deca2565be0d3db9d066ecaf /drivers/gpu/drm/i915/intel_display.c
parentcce66a283e36e7479774de47ae9f33f7db2b8fcf (diff)
downloadlwn-9a5a53b3923d6e8cc4d3b352301059ac6b5c8f68.tar.gz
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drm/i915: Reorganise rules for get_fence/put_fence
By simplifying the rules to calling get_fence when writing to the through the GTT in a tiled manner, and calling put_fence before writing to the object through the GTT in a linear manner, the code becomes clearer and there is less chance of making a mistake. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> [danvet: fixed up conflict with ppgtt code and spelling in a new comment.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 37514a52b05c..9dfa1fa39b39 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2152,13 +2152,11 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
* framebuffer compression. For simplicity, we always install
* a fence as the cost is not that onerous.
*/
- if (obj->tiling_mode != I915_TILING_NONE) {
- ret = i915_gem_object_get_fence(obj, pipelined);
- if (ret)
- goto err_unpin;
+ ret = i915_gem_object_get_fence(obj, pipelined);
+ if (ret)
+ goto err_unpin;
- i915_gem_object_pin_fence(obj);
- }
+ i915_gem_object_pin_fence(obj);
dev_priv->mm.interruptible = true;
return 0;