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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-09-19 17:03:05 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-20 10:19:01 +0200 |
| commit | 81c12f6e78c535533e9258bd9476b5d7419d3cce (patch) | |
| tree | f5abf5a51b112feffbcd6d17910618b009221daa /drivers/gpu/drm/i915/intel_display.c | |
| parent | 6ceeeec04509ac40f91cfc8ffc129e22a136aafe (diff) | |
| download | lwn-81c12f6e78c535533e9258bd9476b5d7419d3cce.tar.gz lwn-81c12f6e78c535533e9258bd9476b5d7419d3cce.zip | |
drm/i915: POSTING_READ IPS_CTL before waiting for the vblank
Make sure we write to IPS before we actually wait.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2ed974e1d08b..1a4232e446fe 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3386,6 +3386,7 @@ static void hsw_disable_ips(struct intel_crtc *crtc) assert_plane_enabled(dev_priv, crtc->plane); I915_WRITE(IPS_CTL, 0); + POSTING_READ(IPS_CTL); /* We need to wait for a vblank before we can disable the plane. */ intel_wait_for_vblank(dev, crtc->pipe); |