summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_display.c
diff options
context:
space:
mode:
authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-06-24 16:42:32 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-06-25 21:07:03 +0200
commit8090c6b9daa04dda649ac0a2209601042abfb0a4 (patch)
tree7cc50fad982ec6c91d13bb4c30f002528237a166 /drivers/gpu/drm/i915/intel_display.c
parent7b0cfee1a24efdfe0235bac62e53f686fe8a8e24 (diff)
downloadlwn-8090c6b9daa04dda649ac0a2209601042abfb0a4.tar.gz
lwn-8090c6b9daa04dda649ac0a2209601042abfb0a4.zip
drm/i915: wrap up gt powersave enabling functions
... instead of calling each one for each generation indiviudally. Notice that we've already managed to be inconsistent, the resume path is missing an IS_VLV check. As a nice benefit we can mark all the platform specific enable/disable functions as static and hide them in intel_pm.c Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c21
1 files changed, 2 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b3052ef70d16..fdca5b925c6c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7172,20 +7172,9 @@ static void ivb_pch_pwm_override(struct drm_device *dev)
void intel_modeset_init_hw(struct drm_device *dev)
{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
intel_init_clock_gating(dev);
- if (IS_IRONLAKE_M(dev)) {
- ironlake_enable_drps(dev);
- ironlake_enable_rc6(dev);
- intel_init_emon(dev);
- }
-
- if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
- gen6_enable_rps(dev_priv);
- gen6_update_ring_freq(dev_priv);
- }
+ intel_enable_gt_powersave(dev);
if (IS_IVYBRIDGE(dev))
ivb_pch_pwm_override(dev);
@@ -7277,13 +7266,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
intel_disable_fbc(dev);
- if (IS_IRONLAKE_M(dev))
- ironlake_disable_drps(dev);
- if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev))
- gen6_disable_rps(dev);
-
- if (IS_IRONLAKE_M(dev))
- ironlake_disable_rc6(dev);
+ intel_disable_gt_powersave(dev);
if (IS_VALLEYVIEW(dev))
vlv_init_dpio(dev);