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author | Damien Lespiau <damien.lespiau@intel.com> | 2013-09-30 14:21:49 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-04 10:30:55 +0200 |
commit | bb2043de02ef15901c2a1e6f9349c989dce42615 (patch) | |
tree | 221f2eb14641efa437be3c0ec31a03291085e812 /drivers/gpu/drm/i915/intel_display.c | |
parent | 02f4c9e02a021c5608dde7ae0607946ab16ae00c (diff) | |
download | lwn-bb2043de02ef15901c2a1e6f9349c989dce42615.tar.gz lwn-bb2043de02ef15901c2a1e6f9349c989dce42615.zip |
drm/i915: Add a more detailed comment about the set_base() fastboot hack
Instead of it just being on the mailing list, let's put Jesse's
explanation next to the code in question.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 214984c814e8..fe863255dedc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2320,7 +2320,19 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, return ret; } - /* Update pipe size and adjust fitter if needed */ + /* + * Update pipe size and adjust fitter if needed: the reason for this is + * that in compute_mode_changes we check the native mode (not the pfit + * mode) to see if we can flip rather than do a full mode set. In the + * fastboot case, we'll flip, but if we don't update the pipesrc and + * pfit state, we'll end up with a big fb scanned out into the wrong + * sized surface. + * + * To fix this properly, we need to hoist the checks up into + * compute_mode_changes (or above), check the actual pfit state and + * whether the platform allows pfit disable with pipe active, and only + * then update the pipesrc and pfit state, even on the flip path. + */ if (i915_fastboot) { I915_WRITE(PIPESRC(intel_crtc->pipe), ((crtc->mode.hdisplay - 1) << 16) | |