summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_reg.h
diff options
context:
space:
mode:
authorMatthew Brost <matthew.brost@intel.com>2021-07-21 14:50:49 -0700
committerJohn Harrison <John.C.Harrison@Intel.com>2021-07-22 10:07:08 -0700
commit3a4cdf1982f05d1da434eb3d777554ea6de6769a (patch)
treed0e8e63920a60ac2f07fedc4d6ae1e04837e639e /drivers/gpu/drm/i915/i915_reg.h
parent2330923e92478ad80417dac114b80d257096e4be (diff)
downloadlwn-3a4cdf1982f05d1da434eb3d777554ea6de6769a.tar.gz
lwn-3a4cdf1982f05d1da434eb3d777554ea6de6769a.zip
drm/i915/guc: Implement GuC context operations for new inteface
Implement GuC context operations which includes GuC specific operations alloc, pin, unpin, and destroy. v2: (Daniel Vetter) - Use msleep_interruptible rather than cond_resched in busy loop (Michal) - Remove C++ style comment v3: (Matthew Brost) - Drop GUC_ID_START (John Harrison) - Fix a bunch of typos - Use drm_err rather than drm_dbg for G2H errors (Daniele) - Fix ;; typo - Clean up sched state functions - Add lockdep for guc_id functions - Don't call __release_guc_id when guc_id is invalid - Use MISSING_CASE - Add comment in guc_context_pin - Use shorter path to rpm (Daniele / CI) - Don't call release_guc_id on an invalid guc_id in destroy v4: (Daniel Vetter) - Add FIXME comment Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210721215101.139794-7-matthew.brost@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b956e3a63ca9..1022400dd1bd 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4142,6 +4142,7 @@ enum {
FAULT_AND_CONTINUE /* Unsupported */
};
+#define CTX_GTT_ADDRESS_MASK GENMASK(31, 12)
#define GEN8_CTX_VALID (1 << 0)
#define GEN8_CTX_FORCE_PD_RESTORE (1 << 1)
#define GEN8_CTX_FORCE_RESTORE (1 << 2)