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| author | Chon Ming Lee <chon.ming.lee@intel.com> | 2013-11-06 14:36:35 +0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-11 10:57:45 +0100 |
| commit | e4607fcfb1cd5d869425e190a85f841fc910c4ca (patch) | |
| tree | 6b7b542956709d4d656e8ed435fec3e0007c8cdf /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 00fe639a56b40930bf27eabeef9a826344d8f4c4 (diff) | |
| download | lwn-e4607fcfb1cd5d869425e190a85f841fc910c4ca.tar.gz lwn-e4607fcfb1cd5d869425e190a85f841fc910c4ca.zip | |
drm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write more PHY centric
vlv_dpio_read/write should be describe more in PHY centric instead of
display controller centric.
Create a enum dpio_channel for channel index and enum dpio_phy for PHY
index. This should better to gather for upcoming platform.
v2: Rebase the code based on
drm/i915/vlv: Fix typo in the DPIO register define.
v3: Rename vlv_phy to dpio_phy_iosf_port and define additional macro
DPIO_PHY, and remove unrelated change. (Ville)
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 29265638bf56..a8a5bcb521c7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -452,6 +452,9 @@ #define DPIO_SFR_BYPASS (1<<1) #define DPIO_CMNRST (1<<0) +#define DPIO_PHY(pipe) ((pipe) >> 1) +#define DPIO_PHY_IOSF_PORT(phy) (dev_priv->dpio_phy_iosf_port[phy]) + /* * Per pipe/PLL DPIO regs */ |