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authorDaniel Vetter <daniel.vetter@ffwll.ch>2014-03-15 00:08:56 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-01 22:58:05 +0200
commita028c4b02a77f6ed63a0b0c4d4340f4a9074df85 (patch)
tree49a548b17b74e6997c5a8fc912cbac74172d4762 /drivers/gpu/drm/i915/i915_reg.h
parentaa83e30d8f71c966498f8f7f587514283c47e1b6 (diff)
downloadlwn-a028c4b02a77f6ed63a0b0c4d4340f4a9074df85.tar.gz
lwn-a028c4b02a77f6ed63a0b0c4d4340f4a9074df85.zip
drm/i915: Add FIXME for bdw semaphore detection in hancheck
Currently not an issue since we don't emit sempahores, but better not forget about those. As a little prep work extract the ipehr decoding for cleaner control flow. And apply a bit of polish. Cc: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 15c27479edbc..085db1b089c1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -244,7 +244,8 @@
#define MI_SEMAPHORE_SYNC_BVE (0<<16) /* VECS wait for BCS (VEBSYNC) */
#define MI_SEMAPHORE_SYNC_VVE (1<<16) /* VECS wait for VCS (VEVSYNC) */
#define MI_SEMAPHORE_SYNC_RVE (2<<16) /* VECS wait for RCS (VERSYNC) */
-#define MI_SEMAPHORE_SYNC_INVALID (3<<16)
+#define MI_SEMAPHORE_SYNC_INVALID (3<<16)
+#define MI_SEMAPHORE_SYNC_MASK (3<<16)
#define MI_SET_CONTEXT MI_INSTR(0x18, 0)
#define MI_MM_SPACE_GTT (1<<8)
#define MI_MM_SPACE_PHYSICAL (0<<8)