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author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-11-20 15:12:07 -0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-11-21 17:47:08 +0100 |
commit | 17a303ec7cd5a245c621b6d0898eb3ef9fc96329 (patch) | |
tree | 35d90637b3b1740526740d32b23bbc8ef73af0e7 /drivers/gpu/drm/i915/i915_reg.h | |
parent | c54e59046c825266ca0decdac47fcfcf902b6cd6 (diff) | |
download | lwn-17a303ec7cd5a245c621b6d0898eb3ef9fc96329.tar.gz lwn-17a303ec7cd5a245c621b6d0898eb3ef9fc96329.zip |
drm/i915: make DP work on LPT-LP machines
We need to enable a special bit, otherwise none of the DP functions
requiring the PCH will work.
Version 2: store the PCH ID inside dev_priv, as suggested by Daniel
Vetter.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9118bd112589..2d838766418b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3851,6 +3851,7 @@ #define SOUTH_DSPCLK_GATE_D 0xc2020 #define PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29) +#define PCH_LP_PARTITION_LEVEL_DISABLE (1<<12) /* CPU: FDI_TX */ #define _FDI_TXA_CTL 0x60100 |