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| author | Chia-I Wu <olv@lunarg.com> | 2014-01-28 13:29:33 +0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-30 13:09:02 +0100 |
| commit | fe27c606625299ec6237ad420e9c2f961fa3bf3d (patch) | |
| tree | ffeca25f51ec2c0ef27c7852d6a0790a48c8a94b /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 6c7a01ec3743a5a6ce9e53a69d7a6c2d8c715eb1 (diff) | |
| download | lwn-fe27c606625299ec6237ad420e9c2f961fa3bf3d.tar.gz lwn-fe27c606625299ec6237ad420e9c2f961fa3bf3d.zip | |
drm/i915: enable HiZ Raw Stall Optimization on HSW
The optimization is available on Ivy Bridge and later, and is disabled by
default. Enabling it helps certain workloads such as GLBenchmark TRex test.
No piglit regression.
v2
- no need to save the register before suspend as init_clock_gating can
correctly program it after resume
- split IVB change to another commit
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index cbbaf261130a..abd18cd58aa1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -935,6 +935,8 @@ #define ECO_GATING_CX_ONLY (1<<3) #define ECO_FLIP_DONE (1<<0) +#define CACHE_MODE_0_GEN7 0x7000 /* IVB+ */ +#define HIZ_RAW_STALL_OPT_DISABLE (1<<2) #define CACHE_MODE_1 0x7004 /* IVB+ */ #define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6) |