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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-01-24 15:29:41 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-24 23:02:30 +0100 |
commit | b41fbda15184e0b4c4e0c0c21737e4abcbaff955 (patch) | |
tree | 498ee627b75e10eecd269ca65bf813f5b25a1a5a /drivers/gpu/drm/i915/i915_reg.h | |
parent | 90f7da3fb5c9988d2ce9e87a35446f8bc9aa5997 (diff) | |
download | lwn-b41fbda15184e0b4c4e0c0c21737e4abcbaff955.tar.gz lwn-b41fbda15184e0b4c4e0c0c21737e4abcbaff955.zip |
drm/i915: DPFLIPSTAT and DPINVGTT registers are VLV only and need an offset
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4f4b989a98ea..e7b13c251ffa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2707,7 +2707,7 @@ #define PIPEFRAMEPIXEL(pipe) _PIPE(pipe, _PIPEAFRAMEPIXEL, _PIPEBFRAMEPIXEL) #define PIPESTAT(pipe) _PIPE(pipe, _PIPEASTAT, _PIPEBSTAT) -#define VLV_DPFLIPSTAT 0x70028 +#define VLV_DPFLIPSTAT (VLV_DISPLAY_BASE + 0x70028) #define PIPEB_LINE_COMPARE_INT_EN (1<<29) #define PIPEB_HLINE_INT_EN (1<<28) #define PIPEB_VBLANK_INT_EN (1<<27) @@ -2721,7 +2721,7 @@ #define SPRITEA_FLIPDONE_INT_EN (1<<17) #define PLANEA_FLIPDONE_INT_EN (1<<16) -#define DPINVGTT 0x7002c /* VLV only */ +#define DPINVGTT (VLV_DISPLAY_BASE + 0x7002c) /* VLV only */ #define CURSORB_INVALID_GTT_INT_EN (1<<23) #define CURSORA_INVALID_GTT_INT_EN (1<<22) #define SPRITED_INVALID_GTT_INT_EN (1<<21) |