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| author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-03-29 12:32:22 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-09 18:03:59 +0200 |
| commit | 2b139522008b824ba17d5160085ce70f940839a0 (patch) | |
| tree | 438f82816506309ecebe4b323e283a62b581ccf2 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 9eb3a75276892b01026489096c670a30bcc66252 (diff) | |
| download | lwn-2b139522008b824ba17d5160085ce70f940839a0.tar.gz lwn-2b139522008b824ba17d5160085ce70f940839a0.zip | |
drm/i915: add enumeration for DDI ports
There are 5 DDI ports on Haswell. Port A is always enabled, and is the one
connected to eDP, and Port E is the one that can be connected to the PCH
using FDI protocol. Ports B, C, D and E can be used for digital outputs.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 61ee4142d643..bca37b3082c5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -27,6 +27,8 @@ #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a))) +#define _PORT(port, a, b) ((a) + (port)*((b)-(a))) + /* * The Bridge device's PCI config space has information about the * fb aperture size and the amount of pre-reserved memory. |