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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-08-15 01:21:55 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-09-03 11:05:06 +0200 |
commit | 81e7f2002b7db269799ebdac0d905574c0a85d1d (patch) | |
tree | 05a6aaf331dc887fbdb1dfb3f601619bdcaaa572 /drivers/gpu/drm/i915/i915_reg.h | |
parent | 1038392b4dd02a46006d38f33aab71486d477ced (diff) | |
download | lwn-81e7f2002b7db269799ebdac0d905574c0a85d1d.tar.gz lwn-81e7f2002b7db269799ebdac0d905574c0a85d1d.zip |
drm/i915: Idle unused rings on gen2/3 during init/resume
gen2/3 platforms have a boatload of rings we're not using. On my 830
the BIOS/hw can leave some of those "active" after resume which will
prevent c3 entry. The ring is apparently considered active whenever
head != tail even if the ring is disabled.
Disable and clear all such unused ringbuffers on init/resume.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b7b2e63c14d0..15c0eaa9f97f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1026,6 +1026,13 @@ enum punit_power_well { #define PGTBL_ADDRESS_LO_MASK 0xfffff000 /* bits [31:12] */ #define PGTBL_ADDRESS_HI_MASK 0x000000f0 /* bits [35:32] (gen4) */ #define PGTBL_ER 0x02024 +#define PRB0_BASE (0x2030-0x30) +#define PRB1_BASE (0x2040-0x30) /* 830,gen3 */ +#define PRB2_BASE (0x2050-0x30) /* gen3 */ +#define SRB0_BASE (0x2100-0x30) /* gen2 */ +#define SRB1_BASE (0x2110-0x30) /* gen2 */ +#define SRB2_BASE (0x2120-0x30) /* 830 */ +#define SRB3_BASE (0x2130-0x30) /* 830 */ #define RENDER_RING_BASE 0x02000 #define BSD_RING_BASE 0x04000 #define GEN6_BSD_RING_BASE 0x12000 |