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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-27 20:36:41 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-27 23:31:09 +0100 |
| commit | f406839f094ef24bb201c9574fdb9ce8e799a975 (patch) | |
| tree | 88d6e38c2f2e840d0c11c694460722f2daa0cae6 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 71e9339c3389de6a685ecb26261a81b8a583aa1c (diff) | |
| download | lwn-f406839f094ef24bb201c9574fdb9ce8e799a975.tar.gz lwn-f406839f094ef24bb201c9574fdb9ce8e799a975.zip | |
drm/i915: Capture ERROR register on Sandybridge hangs
This holds error state from the main graphics arbiter mainly involving
the DMA engine and address translation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 25ed911a3112..fc161196da21 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -306,6 +306,8 @@ #define NOPID 0x02094 #define HWSTAM 0x02098 +#define ERROR_GEN6 0x040a0 + #define MI_MODE 0x0209c # define VS_TIMER_DISPATCH (1 << 6) # define MI_FLUSH_ENABLE (1 << 11) |