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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-10-07 16:01:15 -0700 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-08 10:28:21 +0100 |
| commit | 5b2adf897146edeac6a1e438fb67b5a53dbbdf34 (patch) | |
| tree | 1bc198b1d20401a49cda217ff0981e957285fe1c /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 9f0e7ff4b366d27570cbe0ffa137ed1018009114 (diff) | |
| download | lwn-5b2adf897146edeac6a1e438fb67b5a53dbbdf34.tar.gz lwn-5b2adf897146edeac6a1e438fb67b5a53dbbdf34.zip | |
drm/i915: add Ironlake clock gating workaround for FDI link training
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a72335e940f1..5a22887a5381 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2782,6 +2782,7 @@ #define FDI_RXA_CHICKEN 0xc200c #define FDI_RXB_CHICKEN 0xc2010 #define FDI_RX_PHASE_SYNC_POINTER_ENABLE (1) +#define FDI_RX_CHICKEN(pipe) _PIPE(pipe, FDI_RXA_CHICKEN, FDI_RXB_CHICKEN) /* CPU: FDI_TX */ #define FDI_TXA_CTL 0x60100 |