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author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-07-08 12:22:39 +0100 |
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committer | Keith Packard <keithp@keithp.com> | 2011-07-08 10:23:09 -0700 |
commit | de568510cd410d82d370d3000808aca63ef28a22 (patch) | |
tree | edff697f71023b729eba78bd2622b8ae8d364e93 /drivers/gpu/drm/i915/i915_reg.h | |
parent | f19a079a800dfd365fa8ed422acf29ca7a036ea3 (diff) | |
download | lwn-de568510cd410d82d370d3000808aca63ef28a22.tar.gz lwn-de568510cd410d82d370d3000808aca63ef28a22.zip |
drm/i915: Use of a CPU fence is mandatory to update FBC regions upon CPU writes
...and this requirement is enforced by intel_update_fbc() so we can
remove the later check from g4x_enable_fbc() and ironlake_enable_fbc().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
0 files changed, 0 insertions, 0 deletions