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author | Brad Volkin <bradley.d.volkin@intel.com> | 2014-02-18 10:15:53 -0800 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-04-01 22:58:12 +0200 |
commit | b18b396b3a9a7f2a468bbcefa0ae09451b5ec832 (patch) | |
tree | 11c0dc214c5de5f864124fb50fc8f9ca3351a2e8 /drivers/gpu/drm/i915/i915_reg.h | |
parent | f0a346bdafaf6fc4a51df9ddf1548fd888f860d8 (diff) | |
download | lwn-b18b396b3a9a7f2a468bbcefa0ae09451b5ec832.tar.gz lwn-b18b396b3a9a7f2a468bbcefa0ae09451b5ec832.zip |
drm/i915: Reject commands that explicitly generate interrupts
The driver leaves most interrupts masked during normal operation,
so there would have to be additional work to enable userspace to
safely request/receive an interrupt.
v2: trailing commas, rebased
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index cfaeaf5b90bd..450a08bad7ae 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -270,6 +270,7 @@ #define MI_FLUSH_DW_STORE_INDEX (1<<21) #define MI_INVALIDATE_TLB (1<<18) #define MI_FLUSH_DW_OP_STOREDW (1<<14) +#define MI_FLUSH_DW_NOTIFY (1<<8) #define MI_INVALIDATE_BSD (1<<7) #define MI_FLUSH_DW_USE_GTT (1<<2) #define MI_FLUSH_DW_USE_PPGTT (0<<2) |