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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-10-02 17:43:41 -0500 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-04 19:36:30 +0200 |
| commit | 87f8020ec9e3069597746040a4e8655189bc0c1a (patch) | |
| tree | 127e96a68d138f9190f22044fb7e73e4ba3d1a16 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 61939d977d66951b04cfd4fbe75705614b98ecad (diff) | |
| download | lwn-87f8020ec9e3069597746040a4e8655189bc0c1a.tar.gz lwn-87f8020ec9e3069597746040a4e8655189bc0c1a.zip | |
drm/i915: implement WaDisableEarlyCull for VLV and IVB
Workaround for a culling optimization.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Also apply to haswell, spotted by Damien.]
Reviewed-by: "Lespiau, Damien" <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ea67351368d9..f3a06b421be4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -525,6 +525,7 @@ */ # define _3D_CHICKEN2_WM_READ_PIPELINED (1 << 14) #define _3D_CHICKEN3 0x02090 +#define _3D_CHICKEN_SF_DISABLE_OBJEND_CULL (1 << 10) #define _3D_CHICKEN_SF_DISABLE_FASTCLIP_CULL (1 << 5) #define MI_MODE 0x0209c |