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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-10-30 19:42:51 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-11-07 18:41:51 +0100
commit7c4cde39684cffc6aaae4f34f2bcd987a86befe6 (patch)
tree98b06d3feb938204253d7561b42d4b9d64e98c76 /drivers/gpu/drm/i915/i915_irq.c
parent7d1bd53931e5afe5b2549c045ed4afad71ee6e8f (diff)
downloadlwn-7c4cde39684cffc6aaae4f34f2bcd987a86befe6.tar.gz
lwn-7c4cde39684cffc6aaae4f34f2bcd987a86befe6.zip
drm/i915: Use DPINVGTT_STATUS_MASK
Some has given a name for the DPINVGTT status bitmask, so let's use it instead of the magic number. Looks more like the chv code now. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 98a8d650768b..e41272da67c9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3122,7 +3122,7 @@ static void valleyview_irq_preinstall(struct drm_device *dev)
gen5_gt_irq_reset(dev);
- I915_WRITE(DPINVGTT, 0xff);
+ I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK);
I915_WRITE(PORT_HOTPLUG_EN, 0);
I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));