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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-29 21:43:05 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-31 20:54:12 +0200 |
| commit | 692a04cf77e6073a60a9eaa87b7c409b6cf0283b (patch) | |
| tree | c340ac2da4bbb2c183d7984d8fdd7314ee972765 /drivers/gpu/drm/i915/i915_irq.c | |
| parent | 9a8a2213a778509b724c8fda04be70528a1f7130 (diff) | |
| download | lwn-692a04cf77e6073a60a9eaa87b7c409b6cf0283b.tar.gz lwn-692a04cf77e6073a60a9eaa87b7c409b6cf0283b.zip | |
drm/i915: fix pch_nop support
This was accidentally broken in the south error interrupt handling
work:
commit 8664281b64c457705db72fc60143d03827e75ca9
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Fri Apr 12 17:57:57 2013 -0300
drm/i915: report Gen5+ CPU and PCH FIFO underruns
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 557acd37c788..338e726f4ef5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2551,6 +2551,9 @@ static void ibx_irq_postinstall(struct drm_device *dev) drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; u32 mask; + if (HAS_PCH_NOP(dev)) + return; + if (HAS_PCH_IBX(dev)) { mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER | SDE_TRANSA_FIFO_UNDER | SDE_POISON; @@ -2560,9 +2563,6 @@ static void ibx_irq_postinstall(struct drm_device *dev) I915_WRITE(SERR_INT, I915_READ(SERR_INT)); } - if (HAS_PCH_NOP(dev)) - return; - I915_WRITE(SDEIIR, I915_READ(SDEIIR)); I915_WRITE(SDEIMR, ~mask); } |