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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2014-04-01 15:37:27 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-01 23:30:26 +0200
commit0c84121202bf8b9debd1efae9c6b500330eb24c5 (patch)
tree7404aeecb5d3e2821ac9af8778d884822479667d /drivers/gpu/drm/i915/i915_irq.c
parent823f6b38e85c1d5439ec5c18d7574e22440e44a0 (diff)
downloadlwn-0c84121202bf8b9debd1efae9c6b500330eb24c5.tar.gz
lwn-0c84121202bf8b9debd1efae9c6b500330eb24c5.zip
drm/i915: only enable HWSTAM interrupts on postinstall on ILK+
We should only enable interrupts at postinstall. And now on ILK/SNB/IVB/HSW the irq_preinstall and irq_postinstall functions leave the hardware in the same state. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [danvet: Fix compile fail due to drm_i915_private_t typedef removal.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 26fec6cdfc68..75f19979b8f7 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2912,6 +2912,8 @@ static void ironlake_irq_reset(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ I915_WRITE(HWSTAM, 0xffffffff);
+
GEN5_IRQ_RESET(DE);
if (IS_GEN7(dev))
I915_WRITE(GEN7_ERR_INT, 0xffffffff);
@@ -2923,10 +2925,6 @@ static void ironlake_irq_reset(struct drm_device *dev)
static void ironlake_irq_preinstall(struct drm_device *dev)
{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- I915_WRITE(HWSTAM, 0xeffe);
-
ironlake_irq_reset(dev);
}
@@ -3099,6 +3097,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
dev_priv->irq_mask = ~display_mask;
+ I915_WRITE(HWSTAM, 0xeffe);
+
ibx_irq_pre_postinstall(dev);
GEN5_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask);
@@ -3354,8 +3354,6 @@ static void ironlake_irq_uninstall(struct drm_device *dev)
intel_hpd_irq_uninstall(dev_priv);
- I915_WRITE(HWSTAM, 0xffffffff);
-
ironlake_irq_reset(dev);
}