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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2010-02-01 13:59:17 +0100 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-02-22 11:54:42 -0500 |
| commit | 10ae9bd25acf394c8fa2f9d795dfa9cec4d19ed6 (patch) | |
| tree | d5d67859fab5c64963551a37f95228dde93287ad /drivers/gpu/drm/i915/i915_gem.c | |
| parent | 4a7266123fce399f695b62b7f87b467b317f1487 (diff) | |
| download | lwn-10ae9bd25acf394c8fa2f9d795dfa9cec4d19ed6.tar.gz lwn-10ae9bd25acf394c8fa2f9d795dfa9cec4d19ed6.zip | |
drm/i915: blow away userspace mappings before fence change
This aligns it with the other user of i915_gem_clear_fence_reg,
which blows away the mapping before changing the fence reg.
Only affects userspace if it races against itself when changing
tiling parameters, i.e. behaviour is undefined, anyway.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index a236bfb30844..7b12604a9eb8 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2544,6 +2544,12 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj) if (obj_priv->fence_reg == I915_FENCE_REG_NONE) return 0; + /* If we've changed tiling, GTT-mappings of the object + * need to re-fault to ensure that the correct fence register + * setup is in place. + */ + i915_gem_release_mmap(obj); + /* On the i915, GPU access to tiled buffers is via a fence, * therefore we must wait for any outstanding access to complete * before clearing the fence. |