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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-18 13:59:13 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-19 18:13:40 +0200 |
| commit | cc36513ca36a03e4fd8693d127bac5fe48185786 (patch) | |
| tree | 6d2b07ddb71d20557a03fd3446ede388a6d35f5d /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 395a5abbd97d7d76a7a26da52f33daebe279b3b3 (diff) | |
| download | lwn-cc36513ca36a03e4fd8693d127bac5fe48185786.tar.gz lwn-cc36513ca36a03e4fd8693d127bac5fe48185786.zip | |
drm/i915: Use new frontbuffer bits to increase pll clock
The downclocking checks a few more things, so not that simple to
convert. Also, this should get unified with the drrs handling and also
use the locking of that. Otoh the drrs locking is about as hapzardous
as no locking, at least on first sight.
For easier conversion ditch the upclocking on unload - we'll turn off
everything anyway.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 264de5b040b1..17e90b371dbe 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1612,6 +1612,8 @@ struct drm_i915_gem_object_ops { (1 << (2 +(INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe)))) #define INTEL_FRONTBUFFER_OVERLAY(pipe) \ (1 << (3 +(INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe)))) +#define INTEL_FRONTBUFFER_ALL_MASK(pipe) \ + (0xf << (INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe))) struct drm_i915_gem_object { struct drm_gem_object base; |