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authorRodrigo Vivi <rodrigo.vivi@intel.com>2018-01-29 15:22:14 -0800
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-01-30 10:24:12 -0800
commit3f43031b169361fefe032c13ebf644d17f3d76d6 (patch)
tree94795906b59b524981af2557ac2200c6ef2430a2 /drivers/gpu/drm/i915/i915_drv.h
parent394676f05bee6ddea67e9aafc978a7b9afb72528 (diff)
downloadlwn-3f43031b169361fefe032c13ebf644d17f3d76d6.tar.gz
lwn-3f43031b169361fefe032c13ebf644d17f3d76d6.zip
drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.
The only difference is that this SKUs has the full Port A/E split named as Port F. But since SKUs differences don't matter on the platform definition group and ids, let's merge all off them together. v2: Really include the PCI IDs to the picidlist[]; v3: Add the PCI Id for another SKU (Anusha). v4: Update IDs, really include to pciidlists again. v5: Unify all GT2 IDs. v6: Unify in a way that we don't break early-quirks.c v7: Remove GT reference since it doesn't matter here (Paulo) Also move IS_CNL_WITH_PORT_F macro to this patch to make it easier for review this part and also to get used sooner. v8: Rebased on top of commit 5db47e37b387 ("Revert "drm/i915: mark all device info struct with __initconst"") Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-1-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 88255f9c3cc4..8b5c1a839655 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2648,6 +2648,8 @@ intel_info(const struct drm_i915_private *dev_priv)
(dev_priv)->info.gt == 2)
#define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
(dev_priv)->info.gt == 3)
+#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
+ (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
#define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)