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author | Imre Deak <imre.deak@intel.com> | 2014-03-04 19:22:55 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-03-07 22:36:49 +0100 |
commit | c6cb582e6cf7b2e7ecb9668f53bd4fe6295bee82 (patch) | |
tree | fa18ad2196b8b60287049bf11fce213496d26ca8 /drivers/gpu/drm/i915/i915_drv.h | |
parent | f5938f363535b1723f81bd5debcb7ce5161ece95 (diff) | |
download | lwn-c6cb582e6cf7b2e7ecb9668f53bd4fe6295bee82.tar.gz lwn-c6cb582e6cf7b2e7ecb9668f53bd4fe6295bee82.zip |
drm/i915: split power well 'set' handler to separate enable/disable/sync_hw
Split the 'set' power well handler into an 'enable', 'disable' and
'sync_hw' handler. This maps more conveniently to higher level
operations, for example it allows us to push the hsw package c8 handling
into the corresponding hsw/bdw enable/disable handlers and the hsw BIOS
hand-over setting into the hsw/bdw sync_hw handler.
No functional change.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Appease checkpatch's whitespace complaints.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 857871b76305..9e26103af07a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1014,6 +1014,36 @@ struct intel_ilk_power_mgmt { struct drm_i915_gem_object *renderctx; }; +struct drm_i915_private; +struct i915_power_well; + +struct i915_power_well_ops { + /* + * Synchronize the well's hw state to match the current sw state, for + * example enable/disable it based on the current refcount. Called + * during driver init and resume time, possibly after first calling + * the enable/disable handlers. + */ + void (*sync_hw)(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well); + /* + * Enable the well and resources that depend on it (for example + * interrupts located on the well). Called after the 0->1 refcount + * transition. + */ + void (*enable)(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well); + /* + * Disable the well and resources that depend on it. Called after + * the 1->0 refcount transition. + */ + void (*disable)(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well); + /* Returns the hw enabled state. */ + bool (*is_enabled)(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well); +}; + /* Power well structure for haswell */ struct i915_power_well { const char *name; @@ -1022,10 +1052,7 @@ struct i915_power_well { int count; unsigned long domains; void *data; - void (*set)(struct drm_i915_private *dev_priv, struct i915_power_well *power_well, - bool enable); - bool (*is_enabled)(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well); + const struct i915_power_well_ops *ops; }; struct i915_power_domains { |