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authorChris Wilson <chris@chris-wilson.co.uk>2016-04-28 09:56:51 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-04-28 12:17:32 +0100
commit5d1808ecbc370ce6a083947f8866c8e857671914 (patch)
treea126fde5d6f0266ec212e7b6b32b882333bbdfa3 /drivers/gpu/drm/i915/i915_drv.h
parentef87bba8280442bfbd07df5e409df85b023b39c2 (diff)
downloadlwn-5d1808ecbc370ce6a083947f8866c8e857671914.tar.gz
lwn-5d1808ecbc370ce6a083947f8866c8e857671914.zip
drm/i915: Assign every HW context a unique ID
The hardware tracks contexts and expects all live contexts (those active on the hardware) to have a unique identifier. This is used by the hardware to assign pagefaults and the like to a particular context. v2: Reorder to make sure ctx->link is not left dangling if the assignment of a hw_id fails (Mika). v3: We have 21bits of context space, not 20. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1461833819-3991-17-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 831da9f43324..0f7575252c6e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -851,6 +851,9 @@ struct intel_context {
struct i915_ctx_hang_stats hang_stats;
struct i915_hw_ppgtt *ppgtt;
+ /* Unique identifier for this context, used by the hw for tracking */
+ unsigned hw_id;
+
/* Legacy ring buffer submission */
struct {
struct drm_i915_gem_object *rcs_state;
@@ -1838,6 +1841,13 @@ struct drm_i915_private {
DECLARE_HASHTABLE(mm_structs, 7);
struct mutex mm_lock;
+ /* The hw wants to have a stable context identifier for the lifetime
+ * of the context (for OA, PASID, faults, etc). This is limited
+ * in execlists to 21 bits.
+ */
+ struct ida context_hw_ida;
+#define MAX_CONTEXT_HW_ID (1<<21) /* exclusive */
+
/* Kernel Modesetting */
struct drm_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];